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  Workshop 2007 Report

The workshop was held during the ESREF 2007 conference in Arcachon, France, 45 people attended this exiting workshop where we had great technical exchanges and discussions on ESD, ESDFOS and EOS from a Failure Analysis point of view.

ESD and EOS type damages remain at the origin of a significant percentage of failures despite continuous efforts to improve IO robustness. Contrary to the general belief root cause analysis of ESD and EOS damage is not always trivial. For instance CDM ESD type stress often bypasses the protection circuitry to cause damages inside the heart of an IC. With progress in miniaturization and F/A diagnosis, another ESD type stress, called ESDFOS (Electrostatic Discharge From Outside-to-Surface), has been revealed in recent years. This specific type of surface ESD appears at the wafer- and bare-die-level and impacts directly device surface passivations. ESDFOS is caused by robotic assembly process tools and pad protective structures are useless against such effects. The interpretation problems of these ESDFOS failures have also increased by the introduction of new materials, like copper. Finally ESD/ESDFOS/EOS damages are subject to a wide range of technologies (logic, analog, RF, passive, MEMS/ MOEMS) with specific failure modes, making root cause failure analysis of such damage an even more challenging task.

During the workshop, the following contributions were presented:

  Welcome and EUFANET status update (Philippe Perdu, CNES and Felix Beaudoin, CREDENCE)

  Introduction into ESD challenges (Peter Jacob, EMPA) 

Electrical and physical signatures of EOS and ESD defects: ANADEF workgroup report (Philippe Perdu, CNES)

  The difficult art of locating an ESD failure and identifying its root cause: from physical signature to latent defect (Marise Bafleur, LAAS)

  Influence of CO2 Bubbling (Carbonation) During Semiconductor Wafer Sawing Process (Reinhold Gaertner, Infineon)

 

We also add a WORD model (newficheEOSESD.dot) from ANADEF (in French), you can use it and translate it (free of charge) for EOS/ESD related FA.

 

 

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